1. Field of the Invention
The invention relates to transistor current sources, and in particular, to current mirror circuits.
2. Description of the Related Art
Current mirror circuits of the type to which the present invention relates are widely used as basic building blocks in the design of analog integrated circuits. They may be employed as biasing elements, active loads (e.g., such as in amplifier stages) or as all-purpose current sources (e.g., such as bit current cells in analog-to-digital converters). Some desirable current mirror attributes include accuracy, low voltage drop, and high speed (bandwidth). Basic topologies for conventional current mirror circuits that have proven useful are the simple current mirror, the Wilson mirror, and the cascode mirror.
A current mirror is a current input/output device which, ideally, has zero input impedance and infinite output impedance, so that current output remains a fixed function of current input, regardless of variations in output load, variations in output voltage, or fluctuations in the applied power source. However, the conventional current mirror circuit experiences problems when operating at high current.
In high current applications, the output transistor must be relatively large to facilitate the high current required. Therefore, in most realizable integrated processes, the parasitic capacitance, formed by the internal capacitance between the gate of this output transistor and ground, will be relatively large. As a result, when the current mirror circuit drives this largely capacitive low impedance load an undesirable low frequency pole is created. This pole is formed with the capacitance and the impedance of the current mirror circuit. The problem arises due to the inability to do more than only slightly adjust the pole without affecting the gain ratio desired to amplify the input current. Though particular embodiments discussed herein are implemented utilizing N-channel MOS circuit technology, it should be understood that the same circuits may also be implemented utilizing P-channel MOS or bipolar circuit technologies.
FIG. 1 illustrates a prior art simple current mirror 10 implemented using N-channel MOS transistors. Ideally, the function of current mirror 10 is to match channel current I.sub.OUT through transistor T2 to channel current I.sub.IN through transistor T1, such that current I.sub.OUT "mirrors" current I.sub.IN. The gate of transistor T2 connects to the gate of transistor T1, and the sources of transistors T1 and T2 connect to a common voltage source (e.g., ground), so that the gate-to-source voltages of transistors T1 and T2 are equal (V.sub.GS1 =V.sub.GS2). Therefore, when transistor T2 operates in saturation, the channel current I.sub.OUT through transistor T2 is equal to some pre-established fixed multiple of channel current I.sub.IN through transistor T1. This is true for devices operating both at or above threshold (V.sub.GS1 .gtoreq.=V.sub.T) and in the subthreshold region (V.sub.GS &lt;V.sub.T).
The simple current mirror circuit experiences problems when operating at high currents, thereby requiring T2 to be relatively large. The result is the creation of the low frequency pole formed by the impedance of the circuit and the capacitance of transistor T2 between its gate and ground.
Forms of cascoding or stacking of current mirror circuits have been utilized to reduce the effect of the pole while simultaneously achieving a desired gain. FIG. 2 illustrates a prior art N channel current mirror, commonly known as the "Wilson current mirror." The sources of transistors T1 and T2 are connected together to ground, and the gates of transistors T1 and T2 are connected together. Therefore, the source-gate voltage of transistors T1 and T2 are equal (V.sub.GS1 =V.sub.GS2). The gate and drain of transistor T2 are connected together, forcing transistor T2 into saturation. The input current I.sub.IN which is to be mirrored is connected to the drain of transistor T1 and an output current I.sub.OUT is seen at the drain of a third transistor T3. Transistor T3 isolates the drain of transistor T2 from the voltage applied to the drain of transistor T3, thereby preventing any variation in T3 drain voltage from affecting current I.sub.IN.
An undesirable side effect of cascoding, however, is that output voltage swing (range of output voltage for which the output resistance remains high) becomes limited due to the need to maintain additional series-connected devices in their desired (e.g., saturated for MOS devices) operating regions. This problem of loss of voltage range is further compounded by the increasing desire to provide integrated circuits capable of operating at lower V.sub.DD voltages of 3.0 V rather than 5.0 V. This low voltage in a conventional current mirror circuit is in many circumstances insufficient to allow design and/or proper operation of circuitry serving as current sources. Additionally, the cascoding configuration fails to eliminate the effect of the low frequency pole created at the input node when the circuit operates at high current.
A conventional cascode current mirror 30 is shown in FIG. 3. The cascode mirror 30 is characterized by the addition of a second mirrored pair of transistors T3 and T4, respectively connected between the first pair of transistors T1 and T2 and the input/output terminals, as shown. Transistor T3 has its drain connected to input terminal+V.sub.IN and its source connected to the drain of transistor T1. Transistor T4 has its drain connected to output terminal+V.sub.OUT, its source connected to the drain of transistor T2, and its gate connected to the gate of transistor T3. As a result, current I.sub.IN flowing through transistors T1 and T3, and current I.sub.OUT flowing through transistors T2 and T4 are related in accordance with a fixed aspect ratio of transistors T1 and T2, as for the simple mirror circuit 10 of FIG. 1. Cascode current mirror 30 is, therefore in effect, a cascaded series of two current mirrors 10 of FIG. 1.
This cascode circuit 30 has the same problems as the "Wilson current mirror" circuit in that voltage range loss occurs because of the series-connected transistor configuration and the low frequency pole remains in high current operation.
As mentioned above, there is a strong demand for current mirror circuits designed to operate at high current and with low voltage requirements. However, when the existing circuits operate at high current and drive large transistors having extremely large capacitances between their gates and ground, a low frequency pole results. In these existing current mirror circuits, there is no way to do more than only slightly alter the pole without affecting the gain. Thus, a need exists for a circuit comprising small transistors that reduces the effect of this low frequency pole without lowering the gain, operates at a low voltage, and drives very large signals at the output while maintaining wide bandwidth and high current.